3dfx SST1 Chip Details
| Main Chip Details |
| Manufacturer |
3dfx |
| Process |
500nm |
| Foundry |
TSMC |
| Transistor Count |
1M |
| Die Size |
0mm²
mm x mm |
| Chip Package |
Wirebond |
| Memory Bus |
| Bus Width |
64-bit |
| Memory Channels |
1 x 64-bit |
| Memory Type Support |
SDR |
| Geometry Pipeline |
| Geometry Processing |
|
| Processor Configuration |
|
| Rasteriser |
| Basic Pipeline Config |
1 / 1 / 1
Textures / Pixels / Z
|
| Textures Per Pass |
1 |
| Basis Filtering |
Bilinear |
| Texture Filtering Methods |
Bilinear |
| Texture Compression |
|
| Fragment Processing |
|
| Fragment Processing Precision |
|
| Fragment Processors |
|
| FSAA |
| FSAA Support |
Line |
| ROP Subsamples |
|
| Subsampling Method |
|
| Further Details |
| API Compliance |
DX3.0 |
| System Interconnect |
PCI |
| Display Pipeline |
|
| Multi GPU Support |
|
Notes
Separate chips for Texture Sampling and Pixel processing. Shipped in consimer configuration with only one texture chip, but was capable of utilising 3 - memory cost prevented this in the consumer space.
