SiS Xabre400 Chip Details
| Main Chip Details | |
|---|---|
| Manufacturer | SiS |
| Process | 150nm |
| Foundry | |
| Transistor Count | M |
| Die Size | 0mm² mm x mm |
| Chip Package | Wirebond |
| Memory Bus | |
|---|---|
| Bus Width | 128-bit |
| Memory Channels | 1 x 128-bit |
| Memory Type Support | SDR/DDR |
| Geometry Pipeline | |
|---|---|
| Geometry Processing | T&L |
| Processor Configuration | |
| Rasteriser | |
|---|---|
| Basic Pipeline Config |
8 / 4 / 4 Textures / Pixels / Z |
| Textures Per Pass | |
| Basis Filtering | Bilinear |
| Texture Filtering Methods | Bilinear, Trilinear |
| Texture Compression | |
| Fragment Processing | PS1.3 |
| Fragment Processing Precision | |
| Fragment Processors | |
| FSAA | |
|---|---|
| FSAA Support | SSAA |
| ROP Subsamples | |
| Subsampling Method | |
| Further Details | |
|---|---|
| API Compliance | DX8.1 |
| System Interconnect | AGP8X |
| Display Pipeline | 370MHz RAMDAC |
| Multi GPU Support | |