Toshiba announces 'SpursEngine' SPE co-processor

Thursday 20th September 2007, 07:07:00 PM, written by Carl Bender

Toshiba today revealed the name of a new stream processor design focused on the consumer electronics space and derived from the Cell Broadband Engine. Dubbed "SpursEngineTM," the new chip is to be demonstrated at this years CEATEC JAPAN running Toshiba's previously shown real-time face morphing software. Serving as a co-processor in an x86 Toshiba notebook PC, the demonstration is designed to showcase the image processing strength of the SPEs in a low-power environment.

In architecting the chip, Toshiba chose to excise the resident Power core of the Cell - largely superfluous in a co-processing environment - and to trim the number of SPEs down to four from eight; added to the die are dedicated MPEG-2 and H.264 decoding/encoding silicon. Although the SPEs themselves are quite capable of performing decoding/encoding tasks, Toshiba has opted for a low-power solution to allow the programmable SPEs to focus on image processing. Running at 1.5GHz, the present prototype of the SpursEngine consumes between 10-20 watts, depending on load.

With a previous June announcement that Toshiba had successfully ported the SPE design to a 65nm CMOS process, it is highly probable that the SpursEngine will likewise be fabbed on said node. At 7.07mm^2 per SPE, the complete chip should be relatively small and inexpensive to produce. As with the primary variant of the Cell processor, XDR memory is utilized for its bandwidth benefits in a media-centric environment.

Toshiba states in their release that the chip will be brought to market after CEATEC, to be targeted at both external customers and internal designs of digital consumer products. Although no specific mention of applications outside of the consumer electronics space was made, were Toshiba to source the chip to PC add-in board vendors, the SpursEngine could find a place in PCI Express boards targeting a number of areas such as audio/sound cards, physics acceleration, workstation/rendering tasks, and of course video processing/acceleration. With an existing PCI Express reference design and low-cost chip fabrication, the SpursEngine could provide a more mainstream point of entry into SPE-acceleration than is presently available to consumers.

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