3Dlabs P9 Chip Details
| Main Chip Details | |
|---|---|
| Manufacturer | 3Dlabs |
| Process | 150nm |
| Foundry | TSMC |
| Transistor Count | 45M |
| Die Size | 0mm² mm x mm |
| Chip Package | Wirebond |
| Memory Bus | |
|---|---|
| Bus Width | 128-bit |
| Memory Channels | 1 x 128-bit |
| Memory Type Support | DDR |
| Geometry Pipeline | |
|---|---|
| Geometry Processing | VS2.0 |
| Processor Configuration | Array |
| Rasteriser | |
|---|---|
| Basic Pipeline Config |
2 / 2 / 2 Textures / Pixels / Z |
| Textures Per Pass | 16 |
| Basis Filtering | Trilinear |
| Texture Filtering Methods | Bilinear, Trilinear, Trilinear Anisotropic |
| Texture Compression | |
| Fragment Processing | PS1.3 |
| Fragment Processing Precision | FX9 |
| Fragment Processors | 16 FX9 Scalar Processors per pipe |
| FSAA | |
|---|---|
| FSAA Support | Multi-Sampling |
| ROP Subsamples | 8 |
| Subsampling Method | Sparse Sampling |
| Further Details | |
|---|---|
| API Compliance | DX8.1 |
| System Interconnect | AGP4X |
| Display Pipeline | |
| Multi GPU Support | Up to 2 chips |