3Dlabs P3 Chip Details
| Main Chip Details |
| Manufacturer |
3Dlabs |
| Process |
250nm |
| Foundry |
|
| Transistor Count |
9M |
| Die Size |
0mm² mm x mm |
| Chip Package |
Wirebond |
| Memory Bus |
| Bus Width |
128-bit |
| Memory Channels |
1 x 128-bit |
| Memory Type Support |
SDR, GDR |
| Geometry Pipeline |
| Geometry Processing |
Setup |
| Processor Configuration |
|
| Rasteriser |
| Basic Pipeline Config |
2 / 1 / 1
Textures / Pixels / Z
|
| Textures Per Pass |
2 |
| Basis Filtering |
Bilinear |
| Texture Filtering Methods |
Bilinear, Trilinear |
| Texture Compression |
|
| Fragment Processing |
|
| Fragment Processing Precision |
32-bit |
| Fragment Processors |
|
| FSAA |
| FSAA Support |
|
| ROP Subsamples |
|
| Subsampling Method |
|
| Further Details |
| API Compliance |
DX6.0 |
| System Interconnect |
AGP 2X |
| Display Pipeline |
300MHz RAMDAC |
| Multi GPU Support |
|
Notes
256MB Virtual Texture Address space.