Vertex Shader Structure

The following diagram gives a simplified overview of the Vertex Shader structure and its surroundings:

Based on the program counter an instruction is fetched from Instruction Memory, the instruction is decoded and control signals are sent to the Data Fetch Block which fetches the correct input data for the Processor from the Constant registers -relative or regular addressing based on the contents of the addressing registers - and/or Vertex Input Registers and/or Temporary Registers. The processor is here split into 2 parts. A SIMD Vector Unit capable of typical Floating Point Operations like Add, Multiply, Dot Product, etc. And a Special Function Unit which handles complex operations like Power Function, Sine/Cosine Functions, Reciprocal, Reciprocal Square Root, etc. The results are passed onto the Data Store Block which writes the values out to the Temporary Registers, or Vertex Output Registers, the Addressing Registers or even the program counter (Jumps, Loops, etc.).

Obviously all of this can be pipelined and buffered. For example while the Data Store Block writes out the data for the first program instruction, the processor works on the second instruction, data fetch works on the third instruction and Instruction decode is already working on the fourth instruction. This pipeline structure allows the execution of 1 instruction during every clock, even though an instruction is being worked on by multiple units during multiple clocks. The diagram below illustrates this pipelining functionality:

Quite often in forum discussion and marketing publications Vertex Shaders are referred to without actually ever defining what a Vertex Shader really is. The previous diagram is “a” Vertex Shader but there is not one single definition or implementation of a Vertex Shader. The following sections will discuss various elements of the Vertex Shader implementation, possible problems and various solutions. It should quickly become clear that one hardware vendor’s Vertex Shader is not going to be equal to another vendor’s implementation. Comparing the number of Vertex Shaders is meaningless unless exactly the same Vertex Shader implementation is used. There is no industry standard implementation, all there is a standardised functional description as part of the various APIs. This means that a Vertex Shader has to implement and support a fixed and defined functionality as described by the API but how this is done and how fast, or slow, is completely up to the hardware vendor.