AMD Fusion: 1H 2009 timeframe confirmed
Tuesday 30th January 2007, 12:12:00 PM, written by Arun
In a keynote yesterday at DesignCon and as reported by EE Times,
AMD reiterated their goal to have Fusion available in the notebook
market by early 2009. At initial announcement of ATI's acquisition in
2006, AMD was presenting Fusion as a "2H 2007/1H 2008" product aimed at
"notebooks, desktops and servers" - since then, the timeframe has been
pushed back several times. At one point, during an interview with AMD's
Phil Hester, "late 2009" was even stated but later excused as a mistake
on the editor's part.
What is a tad more surprising, however, is that the project is now said to be shooting for "significant, though not dramatic" increases in performance-per-watt. This is in sharp contrast to AMD's initial announcements, which heralded Fusion as a truly revolutionary offering. The current justification behind Fusion is power consumption, as having the CPU, the GPU and the memory controller on the same chip would reduce the interconnect bandwidth (=> power) required in the system and also eliminate one potential performance bottleneck. Its success will thus depend on AMD's execution and the chip's performance characteristics, which we will hopefully be able to judge better by the time prototypes are available in late 2008.
In that timeframe, AMD is certainly planning to use 45nm (and possibly Z-RAM, at least for the CPU's caches) for Fusion, and they would thus temporarily not be a process node behind Intel. It will also be interesting to see how AMD and Intel's 45nm processes compare, especially so given the skepticism present in the semiconductor press, following the nearly complete lack of precise details on either group's implementation of high-k, metal gates, or even the process in general.
What is a tad more surprising, however, is that the project is now said to be shooting for "significant, though not dramatic" increases in performance-per-watt. This is in sharp contrast to AMD's initial announcements, which heralded Fusion as a truly revolutionary offering. The current justification behind Fusion is power consumption, as having the CPU, the GPU and the memory controller on the same chip would reduce the interconnect bandwidth (=> power) required in the system and also eliminate one potential performance bottleneck. Its success will thus depend on AMD's execution and the chip's performance characteristics, which we will hopefully be able to judge better by the time prototypes are available in late 2008.
In that timeframe, AMD is certainly planning to use 45nm (and possibly Z-RAM, at least for the CPU's caches) for Fusion, and they would thus temporarily not be a process node behind Intel. It will also be interesting to see how AMD and Intel's 45nm processes compare, especially so given the skepticism present in the semiconductor press, following the nearly complete lack of precise details on either group's implementation of high-k, metal gates, or even the process in general.
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