Toshiba presented a 4GHz synthesisable SPU at symposium

Saturday 16th June 2007, 06:06:00 PM, written by Farid

Our singular forum member one stumbled upon an article published in the Japanese magazine, Tech-On, about a presentation made by Toshiba Corporation Semiconductor Company, at the 2007 Symposium on VLSI Circuits at Kyoto on June 14. The company showcased a new implementation of a Streaming Processing Unit (SPU), the same processor found in the STI Cell Broadband Engine, automatically migrated from its original custom design form into a synthesisable design form.

While we still do not know exactly what type of synthesis tools Toshiba Semi used for this migration, the article and the presentation abstract contain some technical information. With the 7.07mm² IC fabricated using a 65nm CMOS process, the logic area is around 20-30% smaller than its custom design alter ego produced on the same node, but it’s also 10% slower (for chips operating at the same frequency). The chip operates at 4GHz with a voltage of 1.4V.

According to Toshiba this migration effort to logic synthesis was undertaken in an effort to get higher design portability for the SPU architecture, simplifying probable future implementation of the SPU technology into other integrated circuits, if needed.

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