NVIDIA: 65nm EDRAM collaboration with TSMC

Wednesday 07th March 2007, 01:01:00 PM, written by Arun

Some time ago, we reported that we believed NVIDIA likely had won the Sony PSP2 contract, given that they were apparently working on an EDRAM design, but that none of their manufacturing partners (excluding Sony, at the time!) were likely candidates for the production of an EDRAM-based GPU. Today's news, however, proves us wrong: NVIDIA and TSMC have just announced that they worked together on the development of the 65nm EDRAM process, and that NVIDIA has a working design based on the technology.

While this doesn't imply that the Sony PSP2 contract has been awarded to a competitor, it does discard one of the key points that made them appear more likely to have won the contract than AMD, Toshiba or Imagination Technologies, among others. Still, having a design that makes use of embedded memory makes them more likely to be among those that compete for such a contract, but not much else. But overall, this seems to be all about NVIDIA targeting the handheld market at large with EDRAM-based designs, not specifically Sony or even Nintendo. And for all we know, maybe Sony is even designing the PSP2 GPU in-house.

Anyway, what is that 65nm EDRAM design that NVIDIA speaks of, you may ask? One possibility is the GoForce 5300. NVIDIA's handheld chipset comparison page even points out that that it sports 2.25MiB of EDRAM. The page does not confirm whether the chip is manufactured on TSMC's 65nm process or not, however, and it might just as well be based on TSMC's 90nm EDRAM process. This might actually be the case, given that TSMC claims a minimum macro size of 4Mb (512KiB) on 65nm, while 2.25MiB would imply NVIDIA is using a 2Mb (256KiB) macro. So, the most likely explanations are that the design is 90nm, or that NVIDIA had access to the 65nm macros' contents and tweaked them to fit their requirements.

It should also be noted that TSMC's new 65nm EDRAM's cell size is similar to IBM's. As such, the density (megabits/mm2) is likely also very similar, although in the trade-off of optimizing for area, power or performance, they both still choose different goals. Sadly, the exact density in terms of megabits per mm² is unknown at this time. IBM decided to focus on performance, in order to be able to use that EDRAM to replace their CPUs' current SRAM caches, especially so for a L3-level cache. NVIDIA and TSMC, on the other hand, apparently chose to optimize the EDRAM for power consumption. This makes sense as GPUs are much more latency tolerant than CPUs, and the process is currently targeted at handheld devices.

UPDATE: Andrew Humber of NVIDIA contributed some official information on the GoForce 5300 and GoForce 6100 here.

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